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    請使用永久網址來引用或連結此文件: https://irlib.pccu.edu.tw/handle/987654321/44003


    題名: 應用於通信系統與超音波檢測系統之具數位自動校正機制高速高解析混合式快閃遞增型三角積分類比數位轉換器
    A High-Speed High-Resolution Hybrid Flash and Incremental Delta Sigma Analog to Digital Converter with Digital Auto-Calibrating Scheme for Communication System and Ultrasound Detecting System
    作者: 陳信良
    貢獻者: 電機工程學系
    關鍵詞: 連續時間三角積分調變器
    遞增型三角積分類比數位轉換器
    快閃式類比數位轉換器
    數位式自動校正機制
    時間交錯技術
    Continuous-time delta sigma modulator
    Incremental delta sigma converter
    Flash analog to digital converter
    Digital self-calibrating scheme
    Time-Interleaved technique
    日期: 2018-04~2020-03
    上傳時間: 2019-05-03 13:10:54 (UTC+8)
    摘要: 近年來由於行動裝置的資訊與通訊技術進展快速,非常適合用於開發可攜式超音波設備,讓超音波設備可以被醫療人員與工程人員更加方便攜帶使用;可以想見的是超音波影像與高速通信傳輸,將是未來遠距醫療與工業檢測很重要的設備。為了達到可支援超音波系統與軟體定義無線電系統之類比數位轉換器,本計畫規畫一個十四位元每秒五千萬取樣數與每秒一億取樣數的類比數位轉換器架構,並且提出可以實現在寬頻、低功率消耗條件下的系統與電路架構;同時,因應製程、電壓與溫度的變異,設計數位式校正電路,以提高計畫目標的可實現性。內容包含一個二級式類比數位轉換器,使用快閃式類比數位轉換器,加上遞增型三角積分類比數位轉換器,配合冗餘編碼技術,與各種關鍵元件需要的偏移電壓或是非線性項的補償校正技術,達成十四位元的高解析度要求,並利用時間交錯技術,配合時間歪斜調整電路,達成每秒一億取樣數的高取樣率目標。
    In recent years, due to the rapid progress of information and communication technology (ICT), mobile devices are very suitable for developing portable ultrasound devices. Therefore, ultrasound devices can be more easily carried by medical staffs and engineers. It is conceivable that ultrasound images and high-speed communications transmission will be the future techniques of telemedicine and industrial detecting. It would be a very important equipment. In order to obtain an analog to digital converters that support ultrasound systems and software-defined radio systems, this project proposes an analog to digital converter architecture with 14-bit of resolution, 50-MS/s and 100-MS/s of sampling rate. The system and circuit architecture can be realized under the conditions of wide frequency and low power consumption. At the same time, a digital correction circuit is designed to improve the realization of the project goal in response to the variation of process, voltage and temperature. Proposed analog to digital converter would employ flash analog to digital converter, incremental delta-sigma analog to digital converter, redundant encoding technique, and offset correction technique and non-linearity correcting technique for various critical components reaching the requirement of 14-bit of high-resolution. Moreover, time-interleaved technique would work with time-skew adjustment circuit to achieve the goal of 100MS/s of high sampling rate.
    顯示於類別:[電機工程系] 研究計畫

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