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    請使用永久網址來引用或連結此文件: https://irlib.pccu.edu.tw/handle/987654321/28762


    題名: A Synthetic Instruction Trace Generation
    指令參考串的合成方法
    作者: 翁志祁(Che-Chi Weng)
    貢獻者: 華岡工程學報
    關鍵詞: instruction references
    synthetic trace
    cache memories
    cache miss
    cache miss inter-arrival distributions
    日期: 2000-06
    上傳時間: 2014-11-03 14:04:58 (UTC+8)
    摘要: 本研究在發展出一套有效且實用的方法,來產生合成的指令參考串,以方便記憶體系統與處理器之研究,特別是快取記憶體。此技術,是先由實際的指令參考串中,收集程式的基本區塊總數,各區塊的大小。以及參考到每個區塊的次數等資料。經由篩選,合併,以及取平均值之法,將這些資料簡化成爲十幾個參數。利用這些參數以及亂數産生器,即可産生合成的指令參考串。此合成指令參考串的評較,我們發現這兩條快取記憶體誤失率的曲線,均在一個次方的誤差以內。更進一步,我們再以快取記憶的誤失出現間隔的分佈,來檢視合成指令參考串,結果也與實際指令參考串的誤失出現間隔的分佈一致。這兩種檢驗標準,對於指令參考的模式的描述至爲重要,我們都獲得滿意的結果。所以,我們相信這個技術是有效且實用的。更好的是,我們發現這些參數未必需要由實際指令參考串中取得,我們利用除錯器和程式執行素描就可得到這些參數。如此一來,快取記憶體的研究者就可以免除擷與收集大量程式參考串的麻煩,不再需要花費大筆經費在購置大容量的儲存裝置,在系統模擬時,也不需花額外的時間去讀取信中的參考串。
    In this research, an effective way of generating synthetic instruction reference stream is developed. It extracts the number of basic program blocks, the size of each block, and the number of accesses to the blocks from a real trace. These values are further processed and reduced to a few numbers of parameters. The synthetic trace is then produced by the use of these parameters and a random number generator. The generated trace is evaluated by comparing the cache miss rates with those of a real trace for various line sizes under different cache sizes. The miss ratio curves of them are well within one order’s differences on all line sizes and cache sizes. Furthermore, the synthetic trace is examined by the cache miss inter-arrival distributions. The result shows that their miss inter-arrival distributions are in accordance with those of the real traces. Both metrics, essential to the representation of reference patterns, are encouragingly satisfactory. Therefore, it is believed that this technique for generating synthetic trace is effective. Furthermore, instead of using the real traces, the parameters needed for generating traces may be obtained by using a debugger and the execution profile of the program. Our technique relieves the burden of collecting real traces, the need of large secondary storage devices, and the time to retrieve for cache memory studies.
    關聯: 華岡工程學報 ; 14 期 (2000 / 06 / 01) , P57 - 70
    顯示於類別:[工學院] 學報-華岡工程學報

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