| 摘要: | 在CMOS的先進元件技術上，有幾種比傳統SiO2 之 permittivity 高之材料如 Al2O3, Y2O3, TiO2, ZrO2, HfO2, 和 SrTiO3 都被研究與採用。其中又以 HfO2 是最佳的材料為首選，而主要原因是其較大之能階質 (band gap) 與高介電係數 (high-k)，這種結構與目前的半導體製程非常類似。但介電係數高的材料有一些不佳之電子特性，例如在 HfO2/Si 之結構中以物理特性而言其晶格介面特性 (interfacial property) 與熱穩定之關係。因此，為達到高品質的閘極層，這些因素都會影響元件之電子特性，也是首要深入研究的課題。另外，目前將高介電係數材料 (high-k) 與 FUSI結合並用在元件的閘極結構上，是一個非常可行的技術，尤其是滿足奈米元件的低漏電流和閘極介電層的厚度的要求（EOT），這種結構是目前的半導體 CMOS 元件技術上重要研究方向。一般而言，對於要更換任何舊材質 (SiO2) 或改進它之前，新材質 (HfO2) 的缺點是需要被了解與分析，尤其是在 high-k 的研究中的主要瓶頸就是它介面特性(interfacial property)的穩定掌握，此外，bonding constrains 也是因素之一。 我們的研究計畫案主要是研究兩種 Ni-FUSI/HfO2/Si 和 Ni-FUSI/HfSiO/Si 的閘極結構，將針對每種結構研究其之物理特性，電子特性，interfacial 特性等深入分析。特別是介面層原子與晶格結構之變化如何影響 interfacial property，另外，我所提出以能階和諧度(band alignment) 的觀點剖析 Ni-FUSI/HfO2/Si 和 Ni-FUSI/HfSiO/Si 之介面特性更是此研究新穎之處。本研究主要有兩方面: (一) 物理特性面: 運用transmission electron microscopy (TEM) 和 x-ray photoemission (XPS)；(二) 電子特性面: 運用 MIS 與 Schottky 二極體的結構分析 Ni-FUSI/HfO2/Si 和 Ni-FUSI/HfSiO/Si 之介面特性與能階 (band alignment)。 一旦所有的實驗結果完成，理論將呈現皆根據實驗結果。這將是第一次，運用電子特性深入與剖析物理之介面特性針對Ni-FUSI/HfO2/Si 和 Ni-FUSI/HfSiO/Si 這兩種閘極結構。
Numerous insulators with a higher permittivity than SiO2, such as Al2O3, Y2O3, TiO2, ZrO2, HfO2, and SrTiO3 have been studied as alternatives for SiO2 in downscaling of complementary metal–oxide–semiconductor (CMOS) field effect transistor dimensions. Among many potential high-k oxides, HfO2 is considered as one of the most promising materials to satisfy considerably large band gap, high dielectric constant, and compatibility with conventional CMOS processes because of the thermal stability. However, there are some problems to deteriorate its electrical characteristics such as the formation of Hf–silicate layer at the interface between HfO2 layer and Si substrate, and the steep increase of the interfacial layer due to the crystallization in HfO2 layer after annealing treatment. To fabricate high-quality gate insulators, it is necessary to find out the change of the electrical properties according to the different chemical states after annealing treatment. In additional, the use of poly-Si gate electrodes on high-k has brought on serious concerns, including high gate leakage, unable to scale down EOT, Fermi level pinning of the effective gate work function, channel mobility and reliability degradations. Metal gate is required for future CMOS generation to suppress boron penetration gate depletion associated with Poly-Si gate. However, the combination of full Ni silicidation (Ni-FUSI) gate and high-k gate dielectrics is one of the most promising gate stack structures because of its highly compatible process with the conventional CMOS process flow. The goal of any potential high-k gate dielectric is to attain a sufficiently high-quality interface with the Si channel, as close as possible to that of SiO2. It is difficult to imagine any material creating a better interface than that of SiO2. It is crucial to understand the origin of the interface properties of any high-k gate dielectric, so that an optimal high-k–Si interface may be obtained. In additional, the bonding constraints must also be considered at the Si dielectric interface. In this proposed work, in order to fully understand the interface of Ni-FUSI/HfO2/Si and Ni-FUSI/HfSiO/Si gate stacks for advanced CMOS device applications, we will focus our investigation in the physical and electrical properties. The key challenges of successfully adopting Ni-FUSI/Hf-based high-k gate stack technology into advanced CMOS are mostly coming from the interfacial properties, which including the thermal stability of high-k, interfacial reaction with underlying Si, charges/traps in high-k as well as interfaces, and gate stack reliability. In this research work , we will study the interface-related issues with high-k gate stacks and investigate how the atomic interface structures affect the properties of metal gate/high-k 表 C011 共 2 頁 第 2 頁 dielectric/Si stacks, or how the macroscopic properties (e.g., band alignments) are related to the electronic structures on small length scale (e.g., interface bonding). A combined approach of (i) characterization techniques, e.g., transmission electron microscopy (TEM), and x-ray photoemission (XPS), and (ii) electrical characterization - MIS diode and Schottky barrier diode theories will be applied to investigate the interface atomic structure and band alignments at NiSi/HfO2/Si and NiSi/HfSiO/Si gate stacks. Characterization studies (TEM and XPS) will provide a complete picture for the metal/oxide and oxide/Si interfaces on the atomic scale. The electrical characterization would offer explanations for the related experimental results and provide insight into the physical mechanism behind the formation of metal/high-k oxide and high-k oxide/Si interfaces. |
